SuperH™ Family E10A-USB Emulator Additional Document for User's Manual: Supplementary Information on Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD

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All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by Renesas Electronics Corporation without notice. Please review the latest information published by Renesas Electronics Corporation through various means, including the Renesas Electronics Corporation website (http://www.renesas.com). SuperH ™ Family E10A-USB Emulator Additional Document for User's Manual Supplementary Information on Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD Rev. 2.00 Nov 2010 SuperH™ Family E10A-USB for SH7450 HS7450KCU01HE Notice 1. All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. 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CAUTION: Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment. Table of Contents Section 1 Connecting the Emulator with the User System .................................................................... 1 1.1 Components of the Emulator .................................................................................................................................... 1 1.2 Connecting the Emulator with the User System ....................................................................................................... 3 1.3 Installing the H-UDI Port Connector on the User System ........................................................................................ 4 1.4 Pin Assignments of the H-UDI Port Connector ........................................................................................................ 4 1.5 Recommended Circuit between the H-UDI Port Connector and the MPU ............................................................... 6 1.5.1 Recommended Circuit (14-Pin Type) ............................................................................................................ 6 Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD ......................... 9 2.1 Differences between the Actual MCUs and the Emulator ........................................................................................ 9 2.2 Specific Functions for the Emulator when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD....................................................................... 14 2.2.1 Event Condition Functions........................................................................................................................... 14 2.2.2 Trace Functions ............................................................................................................................................ 20 2.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK) ........................................... 32 2.2.4 Notes on Setting the [Breakpoint] Dialog Box............................................................................................. 32 2.2.5 Notes on Setting the [Event Condition] Dialog Box and the BREAKCONDITION_ SET Command........ 34 2.2.6 Note on Setting the UBC_MODE Command............................................................................................... 34 2.2.7 Note on Setting the PPC_MODE Command................................................................................................ 34 2.2.8 Performance Measurement Function............................................................................................................ 34 SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 1 of 46 Nov 18, 2010 Section 1 Connecting the Emulator with the User System 1.1 Components of the Emulator The emulator supports the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD. Table 1.1 lists the components of the emulator. SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 2 of 46 Nov 18, 2010 Table 1.1 Components of the Emulator Classi- fication Component Appearance Quan- tity Remarks Hard- ware Emulator box 1 HS0005KCU01H: Depth: 65.0 mm, Width: 97.0 mm, Height: 20.0 mm, Mass: 72.9 g or HS0005KCU02H: Depth: 65.0 mm, Width: 97.0 mm, Height: 20.0 mm, Mass: 73.7 g User system interface cable 1 14-pin type: Length: 20 cm, Mass: 33.1 g User system interface cable 1 36-pin type: Length: 20 cm, Mass: 49.2 g (only for HS0005KCU02H) USB cable 1 Length: 150 cm, Mass: 50.6 g Soft- ware E10A-USB emulator setup program, SuperH TM Family E10A- USB Emulator User’s Manual, Supplementary Information on Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_ BOARD, and SH74552_Debug_MCU_ BOARD*, and Test program manual for HS0005KCU01H and HS0005KCU02H 1 HS0005KCU01SR, HS0005KCU01HJ, HS0005KCU01HE, HS7450KCU01HJ, HS7450KCU01HE, HS0005TM01HJ, and HS0005TM01HE (provided on a CD-R) Note: Additional document for the MCUs supported by the emulator is included. Check the target MCU and refer to its additional document. SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 3 of 46 Nov 18, 2010 1.2 Connecting the Emulator with the User System To connect the E10A-USB emulator (hereinafter referred to as the emulator), the H-UDI port connector must be installed on the user system to connect the user system interface cable. When designing the user system, refer to an example of recommended connection between the connector and the MPU shown in this manual. In addition, read the E10A-USB emulator user's manual and hardware manual for the related device. Table 1.2 shows the type number of the emulator, the corresponding connector type, and the use of AUD function. Table 1.2 Type Number, AUD Function, and Connector Type Type Number Connector AUD Function HS0005KCU02H 36-pin connector Available HS0005KCU01H, HS0005KCU02H 14-pin connector Not available The H-UDI port connector has the 36-pin and 14-pin types as described below. Use them according to the purpose of the usage. 1. 36-pin type (with AUD function) The AUD trace function is supported. A large amount of trace information can be acquired in realtime. The AUD trace function can be used only in Debug_MCU_BOARD. 2. 14-pin type (without AUD function) The AUD trace function cannot be used because only the H-UDI function is supported. Since the 14-pin type connector is smaller than the 36-pin type (1/2.5), the size of the area where the connector is installed on the user system can be reduced. 3. 38-pin type (without AUD function) The emulator cannot be used with the 38-pin type connector mounted on the Debug_MCU_BOARD. SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 4 of 46 Nov 18, 2010 1.3 Installing the H-UDI Port Connector on the User System Table 1.3 shows the recommended H-UDI port connectors for the emulator. Table 1.3 Recommended H-UDI Port Connectors Connector Type Number Manufacturer Specifications 14-pin connector 2514-6002 Minnesota Mining & Manufacturing Ltd. 14-pin straight type 1.4 Pin Assignments of the H-UDI Port Connector Figures 1.1 shows the pin assignments of the 14-pin H-UDI port connectors. Note: Note that the pin number assignments of the H-UDI port connector shown on the following pages differ from those of the connector manufacturer. SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 5 of 46 Nov 18, 2010 Pin 1 mark Notes: 1. Input to or output from the user system. 2. The symbol (#) means that the signal is active-low. 3. The emulator monitors the GND signal of the user system and detects whether or not the user system is connected. 25.0 23.0 6 x 2.54 = 15.24 (2.54) 0.45 Pin 1 Pin 8 Pin 7 Pin 14 Pin 1 mark H-UDI port connector (top view) H-UDI port connector (top view) Pin No. Signal 1 2 3 4 5 6 7 8 9 11 10, 12, and 13 14 TCK TRST# TDO ASEBRK# / BRKACK TMS TDI RESET# N.C. (GND) UVCC GND Input/ Output* 1 *2 *2 GND *3 Output Input Input Output Input/ output Input Input Output Output SH74504/ SH74513 Pin No. 4. When the user system interface cable is connected to this pin and the MPMD pin is set to 0, do not connect to GND but to the MPMD pin directly. Note User reset *2 *5 *4 Unit: mm J1 H4 L2 C8 J2 K3 E2 SH74552/ SH74562 Pin No. H1 H4 J2 B6 H2 J3 D2 Figure 1.1 Pin Assignments of the H-UDI Port Connector (14 Pins) SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 6 of 46 Nov 18, 2010 1.5 Recommended Circuit between the H-UDI Port Connector and the MPU 1.5.1 Recommended Circuit (14-Pin Type) Figure 1.2 shows a recommended circuit for connection between the H-UDI port connector (14 pins) and the MPU when the emulator is in use. Notes: 1. Do not connect anything to the N.C. pins of the H-UDI port connector. 2. The MPMD pin must be 0 when the emulator is connected and 1 when the emulator is not connected, respectively. (1) When the emulator is used: MPMD = 0 (2) When the emulator is not used: MPMD = 1 Figure 1.2 shows an example of circuits that allow the MPMD pin to be GND (0) whenever the emulator is connected by using the user system interface cable. When the MPMD pin is changed by switches, etc., ground pin 9. Do not connect this pin to the MPMD pin. 3. When a network resistance is used for pull-up, it may be affected by a noise. Separate TCK from other resistances. 4. When the power is supplied, the TRST# pin must be low during a specified period regardless of whether or not the H-UDI is used. Reduce the power supplied to the TRST# pin by pulling the pin down by a resistance of 1 kilo-ohm. 5. The pattern between the H-UDI port connector and the MPU must be as short as possible. Do not connect the signal lines to other components on the board. 6. Supply only the Vcc voltage to the UVCC pin because the H-UDI for the MCU operates at the Vcc voltage (I/O power supply). Make the emulator’s switch settings so that the user power will be supplied (SW2 = 1 and SW3 = 1). 7. The resistance values shown in figure 1.2 are for reference. 8. For the pin processing in cases where the emulator is not used, refer to the hardware manual of the related MPU. SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 7 of 46 Nov 18, 2010 When the circuit is connected as shown in figure 1.2, the switches of the emulator are set as SW2 = 1 and SW3 = 1. For details, refer to section 3.8, Setting the DIP Switches, in the SuperH TM Family E10A-USB Emulator User’s Manual. 1 TCK TMS RESET TDI TDO TRST ASEBRK /BRKACK GND GND GND GND (GND) 2 3 4 5 6 7 MPMD 8 9 11 10 12 13 14 TCK TMS TDO TDI TRST ASEBRK/BRKACK N.C. Target MCU UVCC RESET Vcc Vcc Vcc Vcc Vcc Vcc All pulled-up at 4.7 k Ω or more VccQ = I/O power supply H-UDI port connector (14-pin type) User system 1 k Ω Figure 1.2 Recommended Circuit for Connection between the H-UDI Port Connector and MPU when the Emulator is in Use (14-Pin Type) SuperH ™ Family E10A-USB Emulator Section 1 Connecting the Emulator with the User System R20UT0073EJ0200 Rev. 2.00 Page 8 of 46 Nov 18, 2010 Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 9 of 46 Nov 18, 2010 Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD 2.1 Differences between the Actual MCUs and the Emulator 1. When the emulator system is initiated, it initializes the general registers and part of the control registers as shown in table 2.1. The initial values of the actual registers of the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD are undefined. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 10 of 46 Nov 18, 2010 Table 2.1 Register Initial Values at Emulator Link Up Register Emulator at Link Up R0 to R14 H'00000000 R15 (SP) H'A0000000 R0_BANK to R7_BANK H'00000000 PC H'A0000000 SR H'700000F0 GBR H'00000000 VBR H'00000000 MACH H'00000000 MACL H'00000000 PR H'00000000 DBR H'00000000 SGR H'00000000 SPC H'00000000 SSR H'000000F0 FPUL H'00000000 FPSCR H'00040001 FR0 to FR15 H'00000000 XF0 to XF15 H'00000000 DR0 to DR15 H'00000000 XD0 to XD15 H'00000000 2. The emulator uses the H-UDI; do not access the H-UDI. 3. Reset Signals The MCU reset signals are only valid during emulation started with clicking the GO or STEP- type button. If these signals are enabled on the user system in command input wait state, they are not sent to the MCU. Note: Do not break the user program when the RESET# signal is being low and the WAIT control signal is being active. A TIMEOUT error will occur. If the WAIT control signal is fixed to active during break, a TIMEOUT error will occur at memory access. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 11 of 46 Nov 18, 2010 4. Direct Memory Access Controller (DMAC) The DMAC operates even when the emulator is used. When a data transfer request is generated, the DMAC executes DMA transfer. 5. Memory Access during User Program Execution When a memory is accessed from the memory window, etc. during user program execution, the user program is resumed after it has stopped in the emulator to access the memory. Therefore, realtime emulation cannot be performed. The stopping time of the user program is as follows: Environment: Host computer: 3 GHz (Pentium ® IV) : 240 MHz (CPU clock) JTAG clock: 20 MHz (TCK clock) When a one-byte memory is read from the command-line window, the stopping time will be about 40 ms. 6. Memory Access during User Program Break The emulator can download the program for the external flash memory area (for details, refer to section 6.22, Download Function to the Flash Memory Area, in the SuperH TM Family E10A- USB Emulator User’s Manual). Other memory write operations are enabled only for the RAM area and the internal ROM area. Therefore, an operation such as memory write or BREAKPOINT should be set only for the RAM area and the internal ROM area. However, memory write processing in the form of MMU address translation for the internal ROM area is not available. 7. Cache Operation during User Program Break When cache is enabled, the emulator accesses the memory by the following methods: ⎯ At memory write: Writes through the cache, then issues a single write to outside. The LRU is not updated. ⎯ At memory read: Reads memory from the cache. The LRU is not updated. Therefore, when memory read or write is performed during user program break, the cache state does not change. ⎯ Setting a breakpoint or rewriting the internal ROM: Disables the instruction cache. 8. UBC When [User] is specified in the [UBC mode] list box in the [Configuration] dialog box, the UBC can be used in the user program. Do not use the UBC in the user program as it is used by the emulator when [EML] is specified in the [UBC mode] list box in the [Configuration] dialog box. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 12 of 46 Nov 18, 2010 9. Memory Access during Break In the enabled MMU, when a memory is accessed and a TLB error occurs during break, it can be selected whether the TLB exception is controlled or the program jumps to the user exception handler in [TLB Mode] in the [Configuration] dialog box. When [TLB miss exception is enable] is selected, a “Communication Timeout error” will occur if the TLB exception handler does not operate correctly. When [TLB miss exception is disable] is selected, the program does not jump to the TLB exception handler even if a TLB exception occurs. Therefore, if the TLB exception handler does not operate correctly, a “Communication Timeout error” will not occur but the memory contents may not be correctly displayed. 10. Loading Sessions Information in [JTAG clock] of the [Configuration] dialog box cannot be recovered by loading sessions. Thus the TCK value will be 5 MHz. If the [Search the best JTAG clock] option is used when the emulator is initiated. 11. [IO] Window ⎯ Display and modification Do not change values of the User Break Controller because it is used by the emulator. The watchdog timer operates only when the user program is executed. Do not change the value of the frequency change register in the [IO] window or [Memory] window. The internal I/O registers can be accessed from the [IO] window. After the I/O-register definition file is created, the MPU’s specifications may be changed. If each I/O register in the I/O-register definition file differs from addresses described in the hardware manual, change the I/O-register definition file according to the description in the hardware manual. The I/O-register definition file can be customized depending on its format. Note that, however, the emulator does not support the bit-field function. ⎯ Verify In the [IO] window, the verify function of the input value is disabled. 12. Illegal Instructions If illegal instructions are executed by STEP-type commands, the emulator cannot go to the next program counter. 13. [Reset CPU] and [Reset Go] in the [Debug] Menu The H-UDI reset is issued at selection of [Reset CPU] or [Reset Go]. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 13 of 46 Nov 18, 2010 14. Internal Flash Memory Do not use an MCU that has been used for debugging. If the flash memory is rewritten many times, and the MCU is left for a few days, data may be lost due to retention problems. If the flash memory is rewritten many times, the data will not be erased. If an error message is displayed, exchange the MCU for a new one. 15. Emulation of Programming and Erasure of the Internal Flash Memory (1) The setting of the FWE pins is ignored while the emulator is connected. The flash write enable bit (FWE) of the flash pin monitor register (FPMON) becomes undefined. Note this point if the bit is referred to during execution of the user program. (2) The following processing must not be used during calls of the programs for programming and erasing the internal flash memory. • STOP button • Automatic updating and tool chip watching for the watch function • Memory operations during emulation • AUD trace function (non-realtime trace mode) • Monitor function • Displaying a PC or SR value on the status bar (3) Do not set the breakpoint in a block of the internal flash memory that will be a target for programming or erasure. (4) For emulating programming or erasure of the internal flash memory, select the [Flash memory to PC] or [PC to flash memory, Flash memory to PC] item from the [Flash memory synchronization] drop-down list box in the [Configuration] dialog box -> [General] page; do not select the [Disable] or [PC to flash memory] item. 16. MCU Operating Mode Boot mode is not supported. When starting up in the user boot mode, do not set a software break point. Use an event condition. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 14 of 46 Nov 18, 2010 2.2 Specific Functions for the Emulator when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD The devices indicated above do not support the following functions: ⎯ The [ Search the best JTAG clock ] option of the [ CPU Select ] dialog box ⎯ Profiler function 2.2.1 Event Condition Functions The emulator is used to set 11 event conditions (Ch1 to Ch3 and Ch5 to Ch12) and the software trace. Table 2.2 lists the conditions of Event Condition. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 15 of 46 Nov 18, 2010 Table 2.2 Types of Event Conditions Event Condition Type Description Address bus condition (Address) Breaks when the MCU address bus value or the program counter value matches the specified value. Data bus condition (Data) Breaks when the MCU data bus value matches the specified value. Byte, word, or longword can be specified as the access data size. Bus state condition (Bus State) There are two bus state condition settings: Bus state condition: Breaks or acquires a trace when the data bus or the X-Bus or Y-Bus address bus of the MCU is matched. Read/Write condition: Breaks or acquires a trace when the specified read/write condition is matched. Window address condition Breaks or acquires a trace when the data in the specified memory range is accessed. System bus Breaks or acquires a trace when the address or data on the system bus is matched. LDTLB instruction event condition Breaks when the MCU executes the LDTLB instruction. Count Breaks when the conditions set are satisfied the specified number of times. Branch trace condition (Branch trace) Breaks or acquires a trace when a branch occurs with the condition specified by the MCU. (By default, trace acquisition is enabled). Software trace Selects whether or not the software trace is acquired. Action Selects the operation when a condition, such as setting a break, trace, or performance start or end, is matched. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 16 of 46 Nov 18, 2010 Table 2.3 lists the combinations of conditions that can be set under Ch1 to Ch12 and the software trace. Table 2.3 Dialog Boxes for Setting Event Conditions Function Dialog Box Address Bus Condition (Address) Data Bus Condition (Data) ASID Condition (ASID) Bus State Condition (Bus Status) Window Address Condition (Window address) System Bus LDTLB Instruction Break Count Condition (Count) Branch Condition (Branch Trace) Software Trace Action [Event Condition 1] dialog box O X O O X X X X X X O (B and P) [Event Condition 2] dialog box O O O O X X X O X X O (B and P) [Event Condition 3] dialog box O X O X X X X X X X O (B and P) [Event Condition 5] dialog box X X O O O X X X X X O (B, T, and P) [Event Condition 6] dialog box X X O O O X X X X X O (B, T, and P) [Event Condition 7] dialog box X X X X X X O X X X Break fixed [Event Condition 8] dialog box O X X X X O X X X X O (B, T, and P) Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 17 of 46 Nov 18, 2010 Table 2.3 Dialog Boxes for Setting Event Conditions (cont) Function Dialog Box Address Bus Condition (Address) Data Bus Condition (Data) ASID Condition (ASID) Bus State Condition (Bus Status) Window Address Condition (Window address) System Bus LDTLB Instruction Break Count Condition (Count) Branch Condition (Branch Trace) Software Trace Action [Event Condition 9] dialog box O X X X X O X X X X O (B, T, and P) [Event Condition 10] dialog box O X O O X X X X X X O (B and P) [Event Condition 11] dialog box O O O O X X X O X X O (B and P) [Event Condition 12] dialog box X X X X X X X X O X O (B, T, and P) [Software trace] dialog box X X X X X X X X X O Trace fixed Notes: 1. O: Can be set in the dialog box. X: Cannot be set in the dialog box. 2. For the Action item, B: Setting a break is enabled. T: Setting a trace is enabled. P: Setting a performance start or end condition is enabled. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 18 of 46 Nov 18, 2010 Sequential Setting: In the emulator, sequential setting of an Event Condition is enabled. Table 2.4 Sequential Event Conditions Type Event Condition Description 2 Channel Sequential Ch2 -> 1 Halts a program when a condition is satisfied in the order of Event Condition 2, 1. An event condition must be set for Ch2 and Ch1. Ch6 -> 5 Halts a program when a condition is satisfied in the order of Event Condition 6, 5. An event condition must be set for Ch6 and Ch5. Ch11 -> 10 Halts a program when a condition is satisfied in the order of Event Condition 11, 10. An event condition must be set for Ch11 and Ch10. Many Channel Sequential Ch3 -> 2 -> 1 Halts a program when a condition is satisfied in the order of Event Condition 3, 2, 1. An event condition must be set for Ch3, Ch2, and Ch1. [CPU Sequential Event] Page CPU Extend Expands the [CPU Sequential Extend] page. The sequential setting is enabled with any combination. For details, refer to section 2.2.1, Sequential Break Extension Setting, in this manual. SystemBus Sequential Event Ch9 -> 8 Halts a program when a condition is satisfied for Event Condition 9, 8. An event condition must be set for Ch9 and Ch8. [SystemBus Sequential Event] Page Ch8 -> 9 Halts a program when a condition is satisfied for Event Condition 8, 9. An event condition must be set for Ch8 and Ch9. SystemBus Extend Expands the [SystemBus Sequential Extend] page. The sequential setting is enabled with any combination. For details, refer to section 2.2.1, Sequential Break Extension Setting, in this manual. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 19 of 46 Nov 18, 2010 Sequential Break Extension Setting: Figure 2.1 [CPU Sequential Extend] Page (a) Indicates the channel name for setting conditions. (b) Selects a condition that is satisfied before the channel which sets up conditions. When a channel name is selected, it is required that the condition of the channel selected here must have already been satisfied. When [CPU Match flag] is selected, the CPU match flag must be set. When a condition is selected by the channel selected here, no break will occur. (c) When a condition is satisfied, the CPU match flag is set or cleared. When a program breaks, the CPU match flag is initialized. Set the event condition for each channel in the [Event Condition] dialog box; this also applies to the [System Bus Sequential Extend] page. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 20 of 46 Nov 18, 2010 2.2.2 Trace Functions The emulator supports the trace functions listed in table 2.5. Table 2.5 Trace Functions Function Internal Trace AUD Trace Memory Output Trace Branch trace Supported (eight branches) Supported Supported Range memory access trace Supported (eight events) Supported Supported Software trace Supported (eight events) Supported Supported Table 2.6 shows the type numbers that the AUD function can be used. Also, the AUD function can only be used with a Debug_MCU_BOARD. Table 2.6 Type Number and AUD Function Type Number AUD Function HS0005KCU01H Not supported HS0005KCU02H Supported Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 21 of 46 Nov 18, 2010 Branch Trace Functions: The branch source and destination addresses, their source lines, branch types, and types of accessed bus masters are displayed. [Setting Method] Select the check box in the [Branch] group box in the [Branch trace] page of the [Event condition 12] dialog box that opens by double-clicking on the Ch12 (Branch) column of the [Eventpoint] window. The branch condition to be acquired can be set. Figure 2.2 [Branch event] Dialog Box A branch trace can be acquired by selecting the [Acquire trace] check box of the [Action] page. Note: To cancel settings, select [Delete] from the popup menu that is opened by clicking on the Ch12 (Branch) column with the right-mouse button. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 22 of 46 Nov 18, 2010 Range Memory Access Trace Functions: The memory access within the specified range is acquired by a trace. The read cycle, write cycle, or read/write cycle can be selected as the bus type, ASID value, or bus cycle for trace acquisition. [Setting Method] (i) To open the [Event condition 5] or [Event condition 6] dialog box, double-click on the Ch5 (OA) or Ch6 (OA) column of the [Eventpoint] window. (ii) Remove the check mark of the [Don’t care] check box in the [Window address] page and enter the memory range to be set. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 23 of 46 Nov 18, 2010 Figure 2.3 [Window address] Page Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 24 of 46 Nov 18, 2010 (iii) Open the [ASID] page, remove the check mark of the [Don’t care] check box, and enter the ASID value to be set. When the ASID value is not set as a condition, do not remove the check mark of the [Don’t care] check box. (iv) Open the [Bus state] page and specify the bus type and bus cycle that are to be set. Figure 2.4 [Bus State] Page (v) Selecting the [Acquire trace] check box in the [Action] page enables acquiring memory access within the range. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 25 of 46 Nov 18, 2010 Note: To cancel settings, select the popup menu that is opened by clicking on the Ch5 (OA) or Ch6 (OA) column with the right-mouse button. Software Trace Function: Note: This function can be supported with SHC/C++ compiler (manufactured by Renesas Electronics Corporation; including OEM and bundle products) V6.0 or later. However, SHC/C++ compiler (including OEM and bundle products) V8.0 or later is needed when instructions other than those compatible with SH4 are output. When a specific instruction is executed, the PC value at execution and the contents of one general register are acquired by trace. Describe the Trace(x) function (x is a variable name) to be compiled and linked beforehand. For details, refer to the SuperH TM RISC engine C/C++ Compiler, Assembler, Optimizing Linkage Editor User’s Manual. When the load module is downloaded on the emulator and is executed while a software trace function is valid, the PC value that has executed the Trace(x) function, the general register value for x, and the source lines are displayed. To activate the software trace function, select the [Acquire Software trace] radio button in the [Software trace] dialog box that is opened by double-clicking on the software Trace column of the [Eventpoint] window. Note: To cancel settings, select the [Don’t care] radio button in the [Software trace] dialog box or select [Delete] from the popup menu that is opened by clicking on the software Trace column with the right-mouse button. Internal Trace Function: This function is activated by selecting the [Internal trace] radio button in the [Trace type] group box of the [Trace mode] page. Set the trace condition to be used. Notes: 1. If an interrupt is generated at the program execution start or end, including a step operation, the emulator address may be acquired. In such a case, the following message will be displayed. Ignore this address because it is not a user program address. *** EML *** 2. If a completion-type exception occurs during exception branch acquisition, the next address to the address in which an exception occurs is acquired. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 26 of 46 Nov 18, 2010 3. Trace information cannot be acquired for the following branch instructions: • The BF and BT instructions whose displacement value is 0 • Branch to H'A0000000 by reset AUD Trace Functions: This function is operational when the AUD pin of the device is connected to the emulator. It is activated by selecting the [AUD trace] radio button in the [Trace type] group box of the [Trace mode] page. Set the trace condition to be used. The AUD trace can be used only in Debug_MCU_Board. Table 2.7 shows the AUD trace acquisition mode that can be set in each trace function. Table 2.7 AUD Trace Acquisition Mode Type Mode Description Continuous trace occurs Realtime trace When the trace information is being generated intensely that the output from the AUD pin incapable of keeping up, the CPU temporarily suspends the output of trace information. Therefore, although the user program is run in real time, the acquisition of some trace information might not be possible. Non realtime trace When trace information is being generated so intensely that the output from the AUD pin is incapable of keeping up, CPU operations are temporarily suspended and the output of trace information takes priority. In such cases, the realtime characteristics of the user program are lost. Trace buffer full Trace continue This function overwrites the oldest trace information to store the latest trace information. Trace stop After the trace buffer becomes full, the trace information is no longer acquired. The user program is continuously executed. AUD pin 4 bits The trace data is acquired from the 4-bit AUDATA pin. 8 bits The trace data is acquired from the 8-bit AUDATA pin. This mode is not available when the SH74504_Debug_MCU_BOARD or SH74552_Debug_MCU_BOARD is used. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 27 of 46 Nov 18, 2010 To set the AUD trace acquisition mode, click the [Trace] window with the right mouse button and select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be set in the [Trace mode1], [Trace mode2], or [AUD mode] group box in the [Trace mode] page of the [Acquisition] dialog box. Figure 2.5 [Trace Mode] Page Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 28 of 46 Nov 18, 2010 Notes on AUD Trace: 1. When the trace display is performed during user program execution, the mnemonics, operands, or source is not displayed. 2. The AUD branch trace function outputs the differences between newly output branch source addresses and previously output branch source addresses. The window trace function outputs the differences between newly output addresses and previously output addresses. If the previously output address is the same as the upper 16 bits, the lower 16 bits are output. If it matches the upper 24 bits, the lower 8 bits are output. If it matches the upper 28 bits, the lower 4 bits are output. The emulator regenerates the 32-bit address from these differences and displays it in the [Trace] window. If the emulator cannot display the 32-bit address, it displays the difference from the previously displayed 32-bit address. 3. If the 32-bit address cannot be displayed, the source line is not displayed. 4. In the emulator, when multiple loops are performed to reduce the number of AUD trace displays, only the IP counts up. 5. In the emulator, the maximum number of trace displays is 65534 lines (32767 branches). However, the maximum number of trace displays differs according to the AUD trace information to be output. Therefore, the above pointers cannot be always acquired. 6. If a completion-type exception occurs during exception branch acquisition, the next address to the address in which an exception occurs is acquired. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 29 of 46 Nov 18, 2010 Memory Output Trace Functions: This function is activated by selecting the [Use Memory trace] radio button in the [Trace type] group box of the [Trace mode] page. In this function, write the trace data in the specified user memory range. Specify the physical addresses where the output of trace information will start and end in the [Start] edit box and the [End Address] edit box, respectively, of the [User memory area] group box. Set the trace condition to be used. Table 2.8 shows the memory-output trace acquisition mode that can be set in each trace function. Table 2.8 Memory-Output Trace Acquisition Mode Type Mode Description Continuous trace occurs Realtime trace When the trace information is being generated intensely that the output from the AUD pin incapable of keeping up, the CPU temporarily suspends the output of trace information. Therefore, although the user program is run in real time, the acquisition of some trace information might not be possible. Non realtime trace When trace information is being generated so intensely that the output from the AUD pin is incapable of keeping up, CPU operations are temporarily suspended and the output of trace information takes priority. In such cases, the realtime characteristics of the user program are lost. Trace buffer full Trace continue This function overwrites the oldest trace information to store the latest trace information. Trace stop After the trace buffer becomes full, the trace information is no longer acquired. The user program is continuously executed. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 30 of 46 Nov 18, 2010 To set the memory-output trace acquisition mode, click the [Trace] window with the right mouse button and select [Setting] from the pop-up menu to display the [Acquisition] dialog box. The AUD trace acquisition mode can be set in the [Trace mode1] or [Trace mode2] group box in the [Trace mode] page of the [Acquisition] dialog box. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 31 of 46 Nov 18, 2010 Figure 2.6 [Trace Mode] Page Notes: 1. The memory range for which trace is output is the address on the system bus and not supported for the MMU or cache. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 32 of 46 Nov 18, 2010 2. In the memory range for output, do not specify the ranges that the user program has been downloaded or the user program accesses. 3. Do not specify the internal RAM area for the output range. 4. The range for trace output must be 1 MB or less. 2.2.3 Notes on Using the JTAG (H-UDI) Clock (TCK) and AUD Clock (AUDCK) 1. Set the JTAG clock (TCK) frequency to lower than the frequency of the peripheral module clock (CKP). 2. Set the AUD clock (AUDCK) frequency to 50 MHz or lower. If the frequency is higher than 50 MHz, the emulator will not operate normally. 3. The set value of the JTAG clock (TCK) is initialized by executing [Reset CPU] or [Reset Go]. Thus the TCK value will be 5 MHz. 2.2.4 Notes on Setting the [Breakpoint] Dialog Box 1. When an odd address is set, the next lowest even address is used. 2. A BREAKPOINT is accomplished by replacing instructions of the specified address. Accordingly, breakpoints can be set only within RAM areas in CS0 to CS6, the internal RAM area, and the internal ROM area. However, breakpoints cannot be set in internal ROM areas subject to address translation by the MMU. A BREAKPOINT cannot be set at addresses in the following types of area: ⎯ External ROM areas in CS0 to CS6 ⎯ Internal ROM areas subject to address translation by the MMU ⎯ Areas other than CS0 to CS6 except for the internal RAM ⎯ A slot instruction of a delayed branch instruction ⎯ An area that can be only read by MMU 3. During step operation, BREAKPOINTs are disabled. 4. When execution resumes from the address where a BREAKPOINT is specified, single-step operation is performed at the address before execution resumes. Therefore, realtime operation cannot be performed. 5. When a BREAKPOINT is set to the slot instruction of a delayed branch instruction, the PC value becomes an illegal value. Accordingly, do not set a BREAKPOINT to the slot instruction of a delayed branch instruction. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 33 of 46 Nov 18, 2010 6. When the [Normal] option is selected in the [Memory area] group box in the [General] page of the [Configuration] dialog box, a BREAKPOINT is set to a physical address or a virtual address according to the MCU MMU status during command input when the VPMAP_SET command setting is disabled. The ASID value of the MCU PTEH register during command input is used. When VPMAP_SET command setting is enabled, a BREAKPOINT is set to a physical address into which address translation is made according to the VP_MAP table. However, for addresses out of the range of the VP_MAP table, the address to which a BREAKPOINT is set depends on the MCU MMU status during command input. Even when the VP_MAP table is modified after BREAKPOINT setting, the address translated when the BREAKPOINT is set valid. 7. When the [Physical] option is selected in the [Memory area] group box in the [General] page of the [Configuration] dialog box, a BREAKPOINT is set to a physical address. A BREAKPOINT is set after disabling the MCU MMU upon program execution. After setting, the MMU is returned to the original state. When a break occurs at the corresponding virtual address, the cause of termination displayed in the status bar and the [Output] window is ILLEGAL INSTRUCTION, not BREAKPOINT. 8. When the [Virtual] option is selected in the [Memory area] group box in the [General] page of the [Configuration] dialog box, a BREAKPOINT is set to a virtual address. A BREAKPOINT is set after enabling the MCU MMU upon program execution. After setting, the MMU is returned to the original state. When an ASID value is specified, the BREAKPOINT is set to the virtual address corresponding to the ASID value. The emulator sets the BREAKPOINT after rewriting the ASID value to the specified value, and returns the ASID value to its original value after setting. When no ASID value is specified, the BREAKPOINT is set to a virtual address corresponding to the ASID value at command input. 9. An address (physical address) to which a BREAKPOINT is set is determined when the BREAKPOINT is set. Accordingly, even if the VP_MAP table is modified after BREAKPOINT setting, the BREAKPOINT address remains unchanged. When a BREAKPOINT is satisfied with the modified address in the VP_MAP table, the cause of termination displayed in the status bar and the [Output] window is ILLEGAL INSTRUCTION, not BREAKPOINT. 10. If an address of a BREAKPOINT cannot be correctly set in the ROM or flash memory area, a mark z will be displayed in the [BP] area of the address on the [Source] or [Disassembly] window by refreshing the [Memory] window, etc. after Go execution. However, no break will occur at this address. When the program halts with the event condition, the mark z disappears. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 34 of 46 Nov 18, 2010 2.2.5 Notes on Setting the [Event Condition] Dialog Box and the BREAKCONDITION_ SET Command 1. When [Go to cursor], [Step In], [Step Over], or [Step Out] is selected, the settings of Event Condition 3 are disabled. 2. When an Event Condition is satisfied, emulation may stop after two or more instructions have been executed. 3. If a PC break address condition is set to the slot instruction after a delayed branch instruction, user program execution cannot be terminated before the slot instruction execution; execution stops before the branch destination instruction. 2.2.6 Note on Setting the UBC_MODE Command In the [Configuration] dialog box, if [User] is set while the [UBC mode] list box has been set, Ch10 (IA_OA_R) and Ch11 (OA_OA_CT_R) of Event Condition cannot be used. 2.2.7 Note on Setting the PPC_MODE Command In the [Configuration] dialog box, if [User] is set while the [PPC mode] list box has been set, Ch1 and Ch2 of the performance analysis function cannot be used. 2.2.8 Performance Measurement Function The emulator supports the performance measurement function. 1. Setting the performance measurement conditions To set the performance measurement conditions, use the [Performance Analysis] dialog box and the PERFORMANCE_SET command. When a channel line on the [Performance Analysis] window is clicked with the right mouse button, the popup menu is displayed and the [Performance Analysis] dialog box is displayed by selecting [Setting]. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 35 of 46 Nov 18, 2010 Figure 2.7 [Performance Analysis] Dialog Box Note: For the command line syntax, refer to the online help. (a) Specifying the measurement start/end conditions Set the performance measurement conditions in the [Action] page after conditions have been set in the [Event Condition] dialog box that is opened by double-clicking Ch1 to Ch3, Ch5, Ch6, and Ch8 to Ch12 on the [Event Condition] sheet of the [Eventpoint] window. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 36 of 46 Nov 18, 2010 Notes: 1. When no measurement start/end conditions are specified, measurement is started by executing a program and ended when an event condition is satisfied. 2. When only the measurement start or end condition is specified, performance cannot be measured. Be sure to specify both of the measurement start and end conditions. 3. When the measurement start/end conditions are specified, step operation cannot be performed. In addition, when execution is restarted from the address where step operation has been stopped by the break conditions of BREAKPOINT or Event Condition, step functions are used and operation is disabled. Restart execution after the settings of the break conditions of BREAKPOINT or Event Condition have been canceled. 4. It is not possible to specify the break conditions and the measurement start/end conditions at the same time with one channel. If the measurement start/end conditions are specified, the settings of the break conditions will be disabled. 5. If you wish to use event conditions to start and stop performance measurement, the address where the performance measurement will start or stop must not be within nine instructions from a memory-access instruction. Table 2.9 Conditions Specified in the [Action] Page Item Description PA1 pa1_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 1. pa1_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 1. PA2 pa2_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 2. pa2_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 2. PA3 pa3_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 3. pa3_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 3. PA4 pa4_start_point Specifies the conditions of Event Condition that has been set as the measurement start condition of performance channel 4. pa4_end_point Specifies the conditions of Event Condition that has been set as the measurement end condition of performance channel 4. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 37 of 46 Nov 18, 2010 Figure 2.8 [Action] Page Note: PA1 or PA2 cannot be set for Ch8 and Ch9. (b) Measurement tolerance ⎯ The measured value includes tolerance. ⎯ Tolerance will be generated before or after a break. For details, see table 2.12. (c) Measurement items Items are measured in the [Performance Analysis] dialog box for each channel from Ch1 to Ch4. A maximum of four conditions can be specified at the same time. Table 2.10 shows the measurement items. (Options in table 2.10 are parameters for <mode> of the PERFORMANCE_SET command. They are displayed in CONDITION of the [Performance Analysis] window.) Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 38 of 46 Nov 18, 2010 Table 2.10 Measurement Items Classification Type Measurement Item Option Note Disabled None Not measured. CPU performance Cycle Elapsed cycles AC Except for power-on period; counted by the CPU clock. Cycles executed in privileged mode PM The number of privileged- mode cycles among the number of elapsed cycles. Cycles for asserting the SR.BL bit BL The number of cycles when the SR.BL bit = 1 among the number of elapsed cycles. Instruction Number of effective instructions issued I The number of execution instructions = number of valid instructions issued + number of cases of simultaneous execution of two instructions. The number of valid instructions means the number of completed instructions. Number of 2 instruction executed simultaneously 2I The number of times that two instructions are executed simultaneously among the valid instructions issued. Branch Number of unconditional branch BT The number of unconditional branches other than branches occurring after an exception. However, RTE is counted. Exception, interruption Number of exceptions accepted EA Interrupts are included. Number of interrupts accepted INT NMI is included. Number of UBC channel hit UBC Performs OR to count the number of channel-hits in the CPU. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 39 of 46 Nov 18, 2010 Table 2.10 Measurement Items (cont) Classification Type Measurement Item Option Note CPU performance (cont) Stalled cycle Cycles stalled in full- trace mode (with multi-counts) SFM All items are counted independently. Cycles stalled in full- trace mode (without multi-counts) SF This item is not counted if the stall cycle is generated simultaneously with a stall cycle that has occurred due to instruction execution. TLB performance TLB Number of UTLB miss for instruction fetch UMI The number of TLB-miss exceptions generated by an instruction fetch (number of EXPEVT sets). Number of UTLB miss for operand fetch UMO The number of TLB-miss exceptions generated by an operand access (number of EXPEVT sets). Number of ITLB miss IM The number of ITLB misses for valid accesses (does not include UTLB hits or misses). Instruction bus performance Instruction Number of memory accesses for instruction fetch MIF The number of memory accesses by an instruction fetch. Accesses canceled by an instruction-fetch bus are not counted. Instruction fetches, which have been fetched in anticipation of a branch but not actually executed, are counted. Accesses by the PREFI instruction are included. Number of instruction cache access IC The number of accesses for an instruction cache during memory access of the opcode. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 40 of 46 Nov 18, 2010 Table 2.10 Measurement Items (cont) Classification Type Measurement Item Option Note Instruction bus performance (cont) Instruction (cont) Number of instruction cache miss ICM The number of cache misses by an instruction cache access (the number of accesses to the outside of the CPU core due to a cache miss). Number of internal- RAM access for instruction fetch (XY-RAM or O-L memory) XL The number of accesses for the XY or O-L memory during memory accesses of the opcode. Number of I-L memory access for instruction fetch ILIF The number of accesses for the I-L memory during memory accesses of the opcode. Number of U memory access for instruction fetch ULF The number of accesses for the U memory during memory accesses of the opcode. Operand bus performance Access count Number of memory access for operand fetch (READ) MR The number of memory accesses by an operand read (equal to loading on the operand bus). Accesses by the PREF instruction or canceled accesses are not included. Number of memory access for operand fetch (WRITE) MW The number of memory accesses by an operand write (equal to storing memory on the operand bus). Canceled accesses are not included. Number of operand cache access (READ) CR The number of operand-cache reads during memory access (read) of an operand. Number of operand cache access (WRITE) CW The number of operand-cache reads during memory access (write) of an operand. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 41 of 46 Nov 18, 2010 Table 2.10 Measurement Items (cont) Classification Type Measurement Item Option Note Operand bus performance (cont) Access count (cont) Number of internal- RAM access for operand fetch (READ) (XY-RAM or O-L memory) XLR The number of accesses to XY or O-L memory during memory access (read) of an operand. (Accesses via the XY bus and the operand bus are included. When MOVX and MOVY are executed simultaneously, it increments one count regardless of the read or write.) Number of internal- RAM access for operand fetch (WRITE) (XY-RAM or O-L memory) XLW The number of accesses to XY or O-L memory during memory access (write) of an operand. (Accesses via the XY bus and the operand bus are included. When MOVX and MOVY are executed simultaneously, it increments one count regardless of the read or write.) Number of I-L memory access for operand fetch (READ/WRITE) ILRW The number of accesses to I-L memory during memory access (read/write) of an operand. Access miss count Number of operand cache miss (READ) CMR The number of cache misses by an operand cache access (read) (number of accesses to the outside of the CPU core due to a cache miss). Cache misses are not counted by the PREF instruction. Number of operand cache miss (WRITE) CMW The number of cache misses by an operand cache access (write) (number of accesses to the outside of the CPU core due to a cache miss). Write-through accesses are not counted. Cache misses are not counted by the PREF instruction. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 42 of 46 Nov 18, 2010 Table 2.10 Measurement Items (cont) Classification Type Measurement Item Option Note Operand bus performance (cont) Waited cycle Waited cycles for operand fetch (READ) WOR The number of waited cycles by a memory access (read) of an operand. Waited cycles for operand fetch (WRITE) WOW The number of waited cycles by a memory access (write) of an operand. Waited cycles for operand cache miss (READ) WCMR The number of waited cycles by an operand cache miss (read) (however, the number of waited cycles of cache fiII is included due to contention). Waited cycles for operand cache miss (WRITE) WCMW The number of waited cycles by an operand cache miss (write). Number of waited cycles by an I-L memory access for operand fetch (READ) WILR The number of waited cycles by an I-L memory access (read) of an operand. Number of waited cycles by an I-L memory access for operand fetch (WRITE) WILW The number of waited cycles by an I-L memory access (write) of an operand. System bus performance (only available for Ch3 and Ch4) System bus Number of requests RQ The number of valid bus cycles (cells) is counted by the system bus clock. Number of responses RS The number of valid bus cycles (cells) is counted by the system bus clock. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 43 of 46 Nov 18, 2010 Table 2.10 Measurement Items (cont) Classification Type Measurement Item Option Note System bus performance (only available for Ch3 and Ch4) (cont) System bus (cont) Waited cycles for request WRQ The cycles for an issued request (req), that no acceptance signal (gnt) is issued to, are counted by the system bus clock. Even if the waits are issued simultaneously for multiple requests, they are counted as 1. Waited cycles for response WRS The cycles for an issued response (r_req), that no acceptance signal (r_gnt) is issued to, are counted by the system bus clock. Even if the waits are issued simultaneously for multiple requests, they are counted as 1. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 44 of 46 Nov 18, 2010 Table 2.11 shows the measurement items and methods that are mainly used. Table 2.11 Main Measurement Items Main Measurement Item Measurement Method Elapsed time Number of elapsed cycles x CPU clock cycles Number of execution instructions Number of valid instructions issued + number of cases of simultaneous execution of two instructions Number of interrupts accepted Number of exceptions accepted Number of instruction fetches (for both cache and non-cache) Number of memory accesses in an opcode Instruction-cache hit ratio (Number of instruction-cache accesses– instruction-cache miss counts)/instruction-cache access counts Number of operand accesses (for both cache and non-cache) Number of memory accesses in an operand (read) + number of memory accesses in an operand (write) Operand-cache hit ratio (read) (Number of operand-cache accesses (read) – number of operand-cache misses (read))/number of operand-cache accesses (read) Operand-cache hit ratio (write) (Number of operand-cache accesses (write) – number of operand-cache misses (write))/ number of operand-cache accesses (write) Operand-cache hit ratio (Number of operand-cache accesses (read) + number of operand-cache accesses (write) – number of operand-cache misses (read) – number of operand-cache misses (write))/(number of operand-cache accesses (read) + number of operand-cache accesses (write)) System bus: occupied rate of request bus (The equivalent CPU clock value of the number of requests)/number of elapsed cycles System bus: occupied rate of response bus (The equivalent CPU clock value of the number of responses)/number of elapsed cycles Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 45 of 46 Nov 18, 2010 Each measurement condition is also counted when conditions in table 2.12 are generated. Table 2.12 Performance Measurement Conditions to be Counted Measurement Condition Notes No caching due to the settings of TLB cacheable bit Counted for accessing the cacheable area. Cache-on counting Accessing the non-cacheable area is counted less than the actual number of cycles and counts. Accessing the cacheable, X/Y-RAM, and U-RAM areas is counted more than the actual number of cycles and counts. Branch count The counter value is incremented by 2. This means that two cycles are valid for one branch. Notes: 1. In the non-realtime trace mode of the AUD trace and memory output trace, normal counting cannot be performed because the generation state of the stall or the execution cycle is changed. 2. Since the clock source of the counter is the CPU clock, counting also stops when the clock halts in the sleep mode. (d) Extension setting of the performance-result storing counter The 32-bit counter stores the result of performance, and two counters can be used as a 64-bit counter. To set a 64-bit counter, check the [Enable] check box in the [Extend counter] group box of the [Performance Analysis] dialog box for Ch1 and Ch3. 2. Displaying the result of performance The result of performance is displayed in the [Performance Analysis] window or the PERFORMANCE_ANALYSIS command in hexadecimal (32 bits). However, when the extension counter is enabled, it is displayed in hexadecimal (64 bits). Note: If a performance counter overflows as a result of measurement, “*” will be displayed for upper bits. 3. Initializing the measured result To initialize the measured result, select [Initialize] from the popup menu in the [Performance Analysis] window or specify INIT with the PERFORMANCE_ANALYSIS command. Section 2 Software Specifications when Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, SuperH ™ Family E10A-USB Emulator and SH74552_Debug_MCU_BOARD R20UT0073EJ0200 Rev. 2.00 Page 46 of 46 Nov 18, 2010 SuperH ™ Family E10A-USB Emulator Additional Document for User's Manual Supplementary Information on Using the SH74504, SH74513, SH74552, SH74562, SH74504_Debug_MCU_BOARD, and SH74552_Debug_MCU_BOARD Publication Date: Rev.1.00, March 3, 2010 Rev.2.00, November 18, 2010 Published by: Renesas Electronics Corporation http://www.renesas.com Refer to "http://www.renesas.com/" for the latest and detailed information. Renesas Electronics America Inc. 2880 Scott Boulevard Santa Clara, CA 95050-2554, U.S.A. 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